{
    "version": "2026-05-06",
    "description": "Open source digital design and verification tools. Includes tools for RTL synthesis, formal hardware verification, place & route, FPGA programming, and testing with support for HDLs like Verilog, Migen and Amaranth.",
    "homepage": "https://github.com/YosysHQ/oss-cad-suite-build",
    "license": "ISC",
    "architecture": {
        "64bit": {
            "url": "https://github.com/YosysHQ/oss-cad-suite-build/releases/download/2026-05-06/oss-cad-suite-windows-x64-20260506.exe#/dl.7z",
            "hash": "f3a4601b6b14b3236efabfc009582bbfd2e8aefcab0a9ae31576c1fdc619c2e0"
        }
    },
    "extract_dir": "oss-cad-suite",
    "pre_install": "Set-Content -Path \"$dir\\start.bat\" -Value \"@cmd /k $dir\\environment.bat\"",
    "bin": [
        [
            "start.bat",
            "oss-cad"
        ]
    ],
    "checkver": {
        "url": "https://github.com/YosysHQ/oss-cad-suite-build/releases",
        "regex": "tree\\/([\\d-]+)"
    },
    "autoupdate": {
        "architecture": {
            "64bit": {
                "url": "https://github.com/YosysHQ/oss-cad-suite-build/releases/download/$version/oss-cad-suite-windows-x64-$cleanVersion.exe#/dl.7z"
            }
        }
    }
}